DATE2019 Tutorial on OpenCL design flows for Intel and Xilinx FPGAs

Name: DATE2019 Tutorial on OpenCL design flows for Intel and Xilinx FPGAs
Start: 2019-03-25T08:00:00+01:00
End: 2019-03-25T18:00:00+01:00
Location: Paderborn University

March 25, 2019

Paderborn University

Europe/Berlin timezone

Overview
Timetable

Contact

pc2-support@uni-paderborn.de

More details for this event can be found at:

https://pc2.uni-paderborn.de/teaching/trainings/date2019-opencl-fpga-tutorial/

Starts Mar 25, 2019, 8:00 AM

Ends Mar 25, 2019, 6:00 PM

Europe/Berlin

Paderborn University

L3.204