DATE2019 Tutorial on OpenCL design flows for Intel and Xilinx FPGAs

Name: DATE2019 Tutorial on OpenCL design flows for Intel and Xilinx FPGAs
Start: 2019-03-25T08:00:00+01:00
End: 2019-03-25T18:00:00+01:00
Location: Paderborn University

March 25, 2019

Paderborn University

Europe/Berlin timezone

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pc2-support@uni-paderborn.de

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